Fowler etal
time code reader



Feb- 28, 1967 r2.1.. FOWLER ETAL 3,307,155

TME CODE READER Sheets-Sheet 1 Filed March l1, 1954 if V Feb. 28, 1967Filed March l1. 1964 TME IN SECONDS yHlllillllllilll R. L. FOWLER ETALTIME CODE READER 7 Sheets-Sheet 2 FIG. 3

Robert L. Fowler Nckoias Prince. Jr.

JNVENroRs.

Feb 28, 1957 n.1.. FowLER ETAL 3,307,155

T IME CODE READER 7 Sheets-Shee 5 Filed March l1, 1964 FIG. 4

Robert L. Fowler FIG. 5 Nickolas Prince,dr.

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Feb. 28, 1967 R. L. FowLER ETAL 3,307,155

T IME CODE READER Filed March ll. 1964 'T Sheets-Sheet 4 7 /30 5 O A, l

TAPE TNPUTS SHAPEP sEPAPArOR STORAGE CLOCK REAOOUT CONTROL |00 TIME CODEREADER FIG. 6 i

COMPLEX TAPE i M j lNPUT W'- /22 24 25 28 d PULSE TAPE OIFFER- MPMsAMvv. l UUTPUT mpm ENTTATOP A L* V L50o Ps) To SEPARATOP SECTION TOCLOCK SECTION SHAPER SECTION F IG. 7

Robert L. Fowler Nickolas Prince, Jr.

JNVENro/es.

Feb 28, 1967 R. L. FowLER ETAL 3,307,155

TIME CODE READER Filed March ll. 1964 7 Sheets-Sheet 5 RHANTASTON 33MSMv 35 |/SEC.

4.|ms I2 ms TO CLOCK PERTOO RERTOO 2 SECTION 3f COOE FROM m-AWN SRAPERMHK I SECTTON Y 36 Y V 37 39 4| 38 5 SEPARATEO AS PHATTMTON SCHMTOTCATHOOE CODE PEROD TR|GCER FOLLOwER TO STORAGE sEcTsON hmm`re 42 OUTPUTSEPARATOR SECTION FIG. 8

To STORAGE TO CONTROL T/ E F BEAM sw|TCRi-G TUBE N k" m TO STORAGE 52 TOCONTROL 58 F F BEAM sw|TcH|-G TUBE "a" RESET CATHODE P THYRATRONFOLLOWER OUT UT CLOCK SECTION Robert L. Fowler FIG' 9 Nickolos Prince,Jr.

1N V EN TORS.

Feb- 28, 1967 R. L. FowLER ETAI. 3,307,155

TIME CODE READER Filed March ll, 1954 '.7 Sheets-Sheet +3 CODE BST"A"EST'B" FROM SEPARATOR FROM CLOCK FROM CLOCK SECTION SECTION SECTION 5^IW \I\)/ MATRIx *I I I I f I dFF HU* d'- FF i d- FF e d'- FF 4I Sx d g2de dzOd e d- 2OOd 6 d-zOOOd c-A FF T c'- FF Y C@ FF P qd c- FF F4i TOREAOCF 4C TOREAO C IOC TOREAO C 400C TOREAD C MOOOC OUT L OUT OUT 4 OUT 4 I*SECTION -E SECTION i @E SECTION SECTION UT FF b- FF X b' FF 4C b- FF 4hn- 2b blzob b ZOOb b-zooob L E I L of- FF R Il FF W 0'- FF 4b o*- FF 4g{1 La* @-1 IO@ a--IOOo u-IOOOa Y [kw L I L J 2 {THF- l) TIIY l- THY 4THY u STORAGE SECTION FIG. IO IO6\\\ A |02 /IO4 rjgM START SWITCHESRELAY |05 RELAY Ioe\ f IOT CLOSE *SBM 532W START SWITCHES AND RELAY 8 IR b II. F I HSTIA" L O 6|' 0W el' AN AMPL' Nickolas Prince,Jr. WIB *|02INVERT `,0| INVENTOR. 9 NZZ/?? W? CONTROL SECTION 5% FIG. I2 Z M MKMFeb. 28, 1967 R. L, FOWLER ETAL 3,307,155

TIME CODE READER 7 Sheets-Sheet 7 Filed March l1. 1964 mw 11m] VTMT T 4I Robert L Fowler Nickolos Prince,Jr. INVENTQFS United States Patent O3,307,155 TIME CDE READER Robert L. Fowler, China Lake, Calif., andNickolas Prince, Jr., High Rolls, N. Mex., assignors to the UnitedStates of America as represented by the Secretary of the Army Filed Mar.1l, 1964, Ser. No. 351,263 11 Claims. (Cl. S40-172.5)

The invention described herein may be manufactured and used by or forthe Government for governmental purposes without the payment of anyroyalty thereon.

This invention relates to an electronic machine which will read anddisplay the White Sands Missile Range G-2 time code and will also turnon and off at preselected times other devices as desired.

When test data is recorded on magnetic tape, the White Sands MissileRange G-2 time code is also recorded. This time code is recorded to givetime correlation between recording stations and also time correlation tospeciiic events (such as missile takeoff, separation, etc). Then thedata is played back at a data reduction center. However, only specificparts of the recorded data are usually required for reduction purposes;therefore a method for location of these parts on the tape is necessary.A desirous device would be one that would read and display theafore-mentioned G-2 time code.

It is therefore an object of this invention to provide a simplified timecode reader which can perform all the normal functions of previous timecode readers (such as reading and recording pictures, events and varioustypes of intelligible signals from film, tape, and wire) during aselected period or periods of time.

Another object of the invention is to read both the G-2 time code andalso be able to read other time codes which have a basic time rate of100 pulses per second of which the code is in a binary coded decimalform.

A further object ofthe invention is to provide a simplitied time codereader which can perform all the normal functions of previous time codereaders but is both more reliable and cheaper than previous time codereaders.

These and other objects and advantages of the present invention willbecome apparent from the following detailed description and from theaccompanying drawings, in which:

FIGURE 1 illustrates wave forms of the G-2 time code, wherein theabscissa is time and the ordinate is voltage;

FIGURES 2-5 are wave forms of the invention, wherein the abscissa istime and the ordinate is voltage;

FIGURE 6 is a block diagram of a time code reader according to thepresent invention;

FIGURE 7 is a block diagram of the Shaper section of the invention;

FIGURE 8 is a block diagram of the separator section of the invention;

FIGURE 9 is a block diagram of the clock section of the presentinvention;

FIGURE 10 is a block diagram of the storage section of the invention;

FIGURE 11 is a block diagram of the read out section of the invention;and

FIGURE 12 is a block diagram of the control section of the invention.

An understanding of the G-2 time code is necessary before the philosophyof the circuit of this invention can be described. The code is shown inFIGURE 1. The periodic time scale identifies 0.01, 0.2 and l secondscales as G2.1, G2.2 and G23 respectively. G2.l is the continuous trainof single 0.5 ms. pulses. G22 is indicated "ice by a 5 pulse group. G2.3is a pair of consecutive 5 pulse groups. t Code groups are 3 pulsegroup.

Elapsed time is indicated each second as a ve digit decimal number whichrefers to the time at the second marker preceding the number.

The basic repetition rate of the code is 100 pulses persecond. Coderecycling time is 100,000 seconds (in excess of 24 hours). The secondsare separated by the number marker, which is two consecutive five pulsegroups. For zero start operation the number marker (designated G2.3) andthe code will be omitted prior to Zero time. The second is then dividedinto five equal parts by the digit marker, which is a group of tivepulses. Between the digit markers is the actual code in a binary codeddecimal (hereinafter referred to as BCD") form. This BCD has a 2-4-2-1weighting and appears as a burst of three pulses at .03, .08, .13 and.18 second after the digit markers if the number is present. That is, ifthe decimal number were seven, there would be a group of three pulses at.03, .08 and .IS second after the digit marker. The decimal number isthen multiplied by t0n, where n is 4 for the number in the first digitgroup after the number marker, and n is 0 for the last digit group.

A machine that will read and display the aforementioned code will thenhave to perform six separate functions as shown in the overall blockdiagram of FIGURE 6. A shaper 20 having provisions for the differenttape code inputs is shown as having its output connected to ajunction 1. The shaper shapes the code into a standard wave-form. Aseparator section 30 separates the number markers, the digit markers,and the code groups into three different one-pulse groups and feeds themto leads 5 and 2. A clock section 50 having one input connected tojunction 1 and a second input connected to lead 2 establishes a timebase which is synchronized to range code each second. A storage sectionhaving three inputs connected to leads 3, 4, and S takes coincidencesbetween these inputs to set its flip-flops. A readout section looks atthe flip-ops in the storage section and displays its findings on NiXiereadout tubes. A control scction having inputs 8 and 9 from the clocksection and inputs from the output of the readout section takescoincidence at preselected times and then controls a relay to activate adata reduction process (not shown).

CIRCUIT DESCRIPTION Shaper section-(Block Diagram FIGURE 7) The G-Z timecode is available in two forms; one form as a complex with G-l code aspositive-going spikes and G-2 code as negative-going spikes; the otherform as a .500 ms. pulse. The .500 ms. puise form is connected to adifferentiator 21 to be differentiated and then the pulse form istreated the same as the complex. The complex or the output from thedifferentiator 21 is amplified (negative half) and inverted by amplier22 (which is a grid limiting amplifier) so that we have 10Q-voltnegative going spikes output at lead 28. These spikes are used totrigger a monostable multivibrator 24 hereinafter set forth as MSMV.This gives pulse outputs at junctions 25 and 26 of 500 microseconds andan amplitude of 150 volts. Output 25 of MSMV 24 is brought out for anoutput for tape recorders, oscillographs, etc. (not shown). The otheroutput 26 is fed to function 1 and to the separator circuit and to theclock circuit.

Separator section-(Block Diagram FIG URE 8) The code comes into theseparator circuit (wave forms shown in FIGURE 2) from the Shapercircuit, and then is differentiated by differentiator 31. The positivehalf signal passes so as to trigger a phantastron circuit 32 with arundown time of 4.1 milliseconds (wave form FIGURE 2B). The output ofthe phantastron circuit is fed into an AND gate 33 along with the codepulses from junction 1; then if there are five pulses present, therewill be a coincidence at the fth pulse and an output (wave form FIGURE2C). The output of AND gate 33 is used to trigger a monostablemultivibrator 34 with a pulse width of 12 milliseconds (wave form FIG-URE 2D). The output, together with its input, is fed into AND gate 25.The output at lead 2 of this gate (wave form FIGURE 2E) is sent to lead2 of the clock circuit 50. Another phantastron circuit 37 with a rundowntime of 2.1 milliseconds is triggered by the code (wave form FIGURE 2F)by way of differentiator 36. The output of circuit 37 goes into an ANDgate 38 along with Vthe code. This gives an output whenever there is agroup of three pulses present; however, this makes no difference, iaswill be seen when the storage section is described. This output is usedto trigger a Schmitt trigger 39 (wave form FIGURE 2H). The output of 39is sent to a cathode follower 41 for irnpedance matching and then tolead of the storage circuit. A lead 42 goes to an output circuit.

Clock section--(Block Diagram FIG URE 9) The code comes from the shapercircuit 30 and junction 1 to trigger a monostable multivibrator S1 witha pulse width of 6 milliseconds (wave form FIGURE 2J). This then willallow the MSMV to be triggered at 100 per second rate. The output of 51is differentiated and only the negative signal is passed to a flip-flop52 (wave form FIGURE 2K). A reset thyratron 53 is triggered every secondby the pulse output 2 of AND gate 35 in the separator circuit (wave formFIGURE 2L) This is used to reset ip-tlop 52 to the proper state. Theoutput of S3 also is fed through a cathode follower 54 to an output fora one-per-second pulse. Flip-flop 52 is the driver for the firstbeam-switching tube S5. This is a decade tube which is stepped at thehundred-per-second rate, making a complete revolution at aten-per-second rate. Tube 55 is reset to one every second, thus bringingit into step with the incoming signal. The 3rd, 8th, and 0th targets(wave form FIGURES 3B, 3D and 3E) feed matrix 71 in storage section 70`by way of leads 3. The first target (wave form FIGURE 3C) is taken tothe control circuit 100 by lead 8. Spade #0 of the tube 55 is used todrive a ip-op 57. Flip-flop 57 is reset by 53. Flip-flop 57 drivesanother beam-switching tube 58 which rotates at a -per-second rate. thusmaking a complete cycle every second. Tube 58 is reset to 0 by resetthyratron 53 every second. Targets 2, 3, 4, 5, 6, 7, 8 and 9 of tube 58(wave forms FIGURE 3F through 30) are connected by way of leads 4 tomatrix 71 (FIGURE 10 of the storage section). Target 1 is fed to thecontrol circuit 100 by lead 9.

Storage section-(Block Diagram FIG URE 10) A matrix 71 findscoincidences between the code present pulses on lead 5 and the clockpulses (leads 3 and 4) and stores this information on separate tlip-ops.The flip-flops are reset to zero at the digit marker just before thebinary coded decimal number cornes in. Matrix 7l is ia series of ANDgates which will give an output when all elements are present. Theoutputs of the matrix are shown in Wave form in FIGURES 3Q, 3R, and 3Sand in wave form in FIGURES 4T through 4I. Wave form FIGURE 3Q is used`to the reset thyratron 72. This in turn returns flip-flops la, 2b, 4cand 2d to their 0 state. Wave form FIGURE 3R is a coincidence `betweenbeam switching tube (target #3), beam switching tube (target #2) and thecode pulse (if present) and will switch flip-flop la to its 1 strate.Wave form FIGURE 3S goes t-o ip-op 2b, wave form 4T to flip-flop 4c andwave form 4U to flip-flop 2d. The rest of the thyratrons and flip-flopsare similarly set up. The outputs of the ip-ops are fed by way of leads6 to the input of the readout circuit.

4 Readout section-(Block Diagram FIGURE Il) In this section there arefour separate b-ut identical sub sections which will take theinformation stored in storage circuit 70 and display it on numericalindicator tubes 91-94. Only one subsection will be described as theoperation of the others are identical. FIGURE 5 shows the states of thestorage flip-flops for any number. Flip-ops a are the l, flip-flops bare the 2, flip-Hops c are the 4 and ip-ops d are the 2; then to get anynumber, a set of coincidences is taken. Let a be the 0 state offlip-flops a and a' the 1" state, etc. Then the coincidences requiredare as follows:

The first column gives the decimal number, the second the bute forcecoincidences and the third the minimum necessary without ambiguity. Theoutput from the matrix then goes to the grid of an amplifier tube whichhas a number of a numerical indicator tube such as a Nixie readout tube.When there is no output from the ma'trixes 95-98, the tubes 91-94 arecut off; so no display. When there is an output from a matrix, thecorresponding tube conducts and so lights a number. Matrxs 95-97 alsofeed the control circuit by way of leads 7.

Control section-(Block Diagram FIGURE I2) This section gets its inputsfrom the matrixes 95-97 in readout circuit 90 and also from target #l ofbeam switching tube S5 and target #1 of beam switching tube 58. Thematrix outputs are fed into a series of switches 106 (a switch for theunits, tens and hundreds of seconds). This will give one positive pulseout of each switch. The outputs of the three start switches are fed intoan AND gate; O3 with the control pulse. The control pulse is derivedfrom a coincidence (on AND gate 102) between target #l of beam switchingtube 55 and target #l of beam switching tube 58. This is then invertedby an amplifier inverter 101 t0 give a positive puise. The coincidenceof the switches and the control pulse gives a positive-going pulse torelay 104; this energizes relay 104. This in turn energizes relay 105,which is then held on by its own circuitry. Then the positive `pulseends, relay 104 opens, but relay 105 is held closed by its own contactsbeing closed. Another set of switches 107 sets another number which willgive three outputs at once when the number is reached. These positivepulses, along with the control positive pulse, give a coincidence outputfor AND gate 107. This causes relay 108 to be activated. Relay 108causes relay 105 to open. Relay 105 controls any desired apparatus; suchas a data reduction apparatus.

While the invention has been described with reference to a preferredembodiment thereof, it will be apparent that various modifications andother embodiments thereof will occur to those skilled in the art withinthe scope of the invention. Accordingly, I desire the scope of myinvention to be limited only by the appended claims.

We claim:

1. A time code reader comprising in combination an input signal fed toan input of a shaper circuit; a separator circuit having an input andtwo outputs; connections from an output terminal of said Shaper circuitto the input of said separator circuit; a clock circuit having two inputterminals and an output terminal; means connecting the output terminalof said shaper circuit to one of said input terminals of said clockcircuit; connections from one output terminal of said separator circuitto the other input terminal of said clock circuit; a storage circuithaving two inputs and an output; means connecting the other output ofthe separator circuit to one input of said storage circuit; meansconnecting the output terminal of said clock circuit to the other inputof the storage circuit; and a readout circuit connected to the output ofsaid storage circuit.

2. A time code reader as set forth in claim 1, wherein said shapercircuit is adapted to differentiate a pulse signal input and fed saidsignal through an amplifier means to a monostable multivibrator.

3. A time code reader as set forth in claim 2, wherein said shapercircuit is also adapted to feed a complex input signal directly to aninput of said amplifier.

4. A time code reader as set forth in claim 1, wherein said separatorcircuit comprises first `and second phantastron circuits havingdifferent rundown times; said first phantastron circuit connected to oneinput of a first AND gate; said second phantastron circuit beingconnected to one input of a second AND gate; means connecting the outputterminal of said shaper circuit to each of said phantastron circuits andto another input of each of said AND gates; means connecting the outputof said first AND gate to said one output terminal of said separator; amonostable multivibrator having its input connected to an output of saidsecond AND gate, and its output connected to one input of a third ANDgate; said third AND gate `having a second input connected to the outputof said second AND gate, and having an output connected to said otheroutput of said separator circuit.

5. A time code reader as set forth in claim l, wherein said clockcircuit comprises a monostable multivibrator having its input connectedto said shaper output and its output connected to a first input of afirst fiip-op; said flip-flop having a second input and an output; theoutput of said ip-fiop being connected to a first beam switching tube; areset thyratron having an input connected to said other output of saidseparator and having first and sec-ond outputs; said first output beingconnected to said rst beam switching tube and to a second beam switchingtube; said second output of the reset thyratron being connected to thesecond input of said rst ip-op and to a first input of a secondfiip-tiop; said second fiip-op having a second input connected to saidfirst beam switching tube and an output connected to said second beamswitching tube; and means connecting an output of each of said beamswitching tubes to the other input of said storage circuit.

6. A time code reader as set forth in claim l; wherein said storagecircuit comprises a matrix having a first input connected to said oneoutput of said separator circuit and a second input connected to theoutput terminal of said clock circuit; and said matrix having aplurality of -outputs connected to an input of said readout circuit byway of a plurality of fiip-flop means.

7. A time code reader as set forth in claim 1 further comprising acontrol circuit connected to the output terminal of said clock circuitand to an output terminal of said readout circuit.

8. A time code reader as set forth in claim 4, wherein said shapercircuit is adapted to differentiated pulse signal input and fed saidsignal through an amplifier means to a monostable multivibrator.

9. A time code reader `as set forth in claim 8, wherein said shapercircuit is also adapted to feed a complex input signal directly to aninput of said amplifier.

10. A time code reader `as set forth in claim 9, wherein said storagecircuit comprises a matrix having a first input connected to said oneoutput of said separator circuit and a second input connected to theoutput terminal of said clock circuit; and said matrix having aplurality of outputs connected to an input of said readout circuit byway of a plurality of ip-op means.

11. A time code reader as set forth in claim 10 further comprising acontrol circuit connected to the output terminal of said clock circuitand to an output terminal of said readout circuit.

No references cited.

ROBERT C. BAlLEY, Primary Examiner'.

G. D. SHAW.y Assistant Examiner.

1. A TIME CODE READER COMPRISING IN COMBINATION AN INPUT SIGNAL FED TOAN INPUT OF A SHAPER CIRCUIT; A SEPARATOR CIRCUIT HAVING AN INPUT ANDTWO OUTPUTS; CONNECTIONS FROM AN OUTPUT TERMINAL OF SAID SHAPER CIRCUITTO THE INPUT OF SAID SEPARATOR CIRCUIT; A CLOCK CIRCUIT HAVING TWO INPUTTERMINALS AND AN OUTPUT TERMINAL; MEANS CONNECTING THE OUTPUT TERMINALOF SAID SHAPER CIRCUIT TO ONE OF SAID INPUT TERMINALS OF SAID CLOCKCIRCUIT; CONNECTIONS FROM ONE OUTPUT TERMINAL OF SAID SEPARATOR CIRCUITTO THE OTHER INPUT TERMINAL OF SAID CLOCK CIRCUIT; A STORAGE CIRCUITHAVING TWO INPUTS AND AN OUTPUT; MEANS CONNECTING THE OTHER OUTPUT OFTHE SEPARATOR CIRCUIT TO ONE INPUT OF SAID STORAGE CIRCUIT; MEANSCONNECTING THE OUTPUT TERMINAL OF SAID CLOCK CIRCUIT TO THE OTHER INPUTOF THE STORAGE CIRCUIT; AND A READOUT CIRCUIT CONNECTED TO THE OUTPUT OFSAID STORAGE CIRCUIT.